Could US6813742B2 be the key patent at the heart of TurboCode LLC’s aggressive litigation campaign? This patent, currently being asserted against multiple companies, is part of a widespread legal strategy involving seven active cases, two patents in litigation, and over 67 related parties. TurboCode LLC, a well-known non-practising entity (NPE), is strategically targeting tech companies, raising critical questions about the strength of its claims.
At its core, US6813742B2 focuses on error correction coding, a technology essential for reliable data transmission. Error correction techniques ensure that data remains intact despite interference or signal degradation, making them crucial for wireless communication, storage devices, and digital broadcasting. The patent in question describes an approach for encoding and decoding data efficiently, a fundamental process in modern communication systems.
Given its broad applicability, this patent has become a prime litigation target, with TurboCode LLC asserting its rights against major industry players. But how strong is its claim? This is where Global Patent Search (GPS) comes in. It helps identify related patents that could challenge the validity of US6813742B2. GPS enables precise feature mapping, allowing legal teams to uncover pre-existing technologies that may weaken TurboCode’s position.
Let’s dive deeper into the patent, its claims, and the potential related patents that could influence these ongoing cases.
Understanding Patent US6813742B2
Patent US6813742B2 describes a high-speed Turbo Codes decoder specifically designed for 3G wireless communications. The invention introduces an efficient and power-saving method for implementing Turbo Code decoding in ASIC (Application-Specific Integrated Circuit) or DSP (Digital Signal Processor) designs. By utilizing pipelined Soft-In Soft-Out (SISO) Log-MAP decoders, the patented system enhances data throughput and reduces power consumption, making it a practical solution for mobile and wireless communication devices.
Source: US6813742B2
Its four key features are:
#1. Pipelined log-MAP decoding – The patent introduces multiple log-MAP decoders operating in a pipeline mode, where Decoder A and Decoder B work simultaneously, improving efficiency.
#2. Efficient ASIC implementation – The design simplifies hardware implementation by using binary adders instead of complex multiplications, making it more suitable for low-power, high-speed processing.
#3. Iterative decoding mechanism – The system reiterates data decoding between two Log-MAP decoders in a feedback loop, refining error correction with each iteration.
#4. Optimized for 3G wireless networks – The technology supports CDMA2000 and WCDMA protocols, ensuring low bit-error rates (BER) and higher data speeds for mobile communication.
The patent’s focus on Turbo Codes error correction makes it a key target in wireless technology litigation. Since error correction coding is a fundamental process in modern telecommunications, companies using similar techniques in their devices could face infringement claims. However, with the right related patents, defendants may challenge the validity of TurboCode LLC’s claims.
Related Patent References for US6813742B2
#1. CA2273608C
This patent, filed on June 1, 1999, describes a Turbo decoding system using max-log-APP decoders with an iterative feedback mechanism. It focuses on a reduced-complexity approach to Turbo-like forward-error-correcting codes, making it a relevant reference to US6813742B2, particularly in its use of iterative processing and feedback loops in baseband processors.
Key Features of this Related Patent:
- Baseband processor for iterative processing – The reference describes the iterative processing of sequences of received baseband digital signals, aligning with a fundamental feature of US6813742B2.
- Turbo decoders in a feedback loop – It discusses Turbo decoders utilizing two decoders in an iterative process, although it does not explicitly state that they are serially coupled in a circular circuit.
- Soft decision decoding with feedback – Each decoder processes soft decision data from the preceding decoder’s output, a critical aspect of the subject patent.
- Memory and interleaving process – While the reference mentions interleaving and de-interleaving functions, it does not explicitly state that each soft decision decoder has an associated memory module electrically coupled to its output.
Which Features of US6813742B2 are Disclosed by CA2273608C?
| Key Feature of US6813742B2 | Disclosure Status |
| A baseband processor performs iterative processing of sequences of received baseband digital signals | Fully Disclosed |
| At least two soft decision decoders are serially coupled in a circular circuit | Partially Disclosed |
| Each decoder processes soft decisions from the preceding decoder output data in an iterative mode | Fully Disclosed |
| The output of the memory module associated with the last soft decision decoder is fed back as input to the first soft decision decoder | Partially Disclosed |
Key Excerpt from CA2273608C:
“This invention relates to max-log-APP decoding and is particularly concerned with max-log-APP decoder systems and methods suited for Turbo and Turbo-like forward-error-correcting codes by using iterative processing.”
#2. KR100651473B1
This patent, filed on July 5, 2000, describes a Turbo Code decoder utilizing pipeline techniques to speed up decoding time. The invention targets improving decoding efficiency by implementing iterative processing and feedback loops with memory modules. This patent is relevant to US6813742B2 due to the pipelined architecture for turbo decoding and the iterative nature of the decoding process.
Source: KR100651473B1
Key Features of this Related Patent:
- Baseband processor for iterative processing of received data – The patent describes a baseband processor that iteratively processes multiple sequences of received baseband digital signals, aligning with the iterative decoding feature of US6813742B2.
- Serially connected soft decision decoders in a pipeline structure – The reference describes two decoding units connected serially in a pipeline structure, partially matching the feature of serially connected decoders in US6813742B2.
- Iterative processing with soft decision feedback – It details how each decoder processes soft decision outputs from the preceding decoder in an iterative mode, directly matching US6813742B2’s iterative feedback mechanism.
- Memory modules coupled to decoders – This patent explains how memory modules are electrically coupled to decoding cells for storing and transmitting data, which aligns with the memory coupling feature of US6813742B2.
Which Features of US6813742B2 are Disclosed by KR100651473B1?
| Key Feature of US6813742B2 | Disclosure Status |
| A baseband processor iteratively processes multiple sequences of received baseband digital signals | Fully Disclosed |
| At least two soft decision decoders are connected serially in a circular circuit | Partially Disclosed |
| Each decoder processes soft decision from the preceding decoder’s output data in an iterative mode | Fully Disclosed |
| A memory module is electrically coupled to an output of each corresponding soft decision decoder | Fully Disclosed |
| The output of the memory module associated with the first soft decision decoder is fed as input to the second soft decision decoder | Fully Disclosed |
| The last soft decision decoder receives output from the memory module associated with the preceding soft decision decoder | Fully Disclosed |
Key Excerpt from KR100651473B1:
“The present invention relates to a decoder of a turbo code, and more particularly, to a decoder of a turbo code capable of speeding up the decoding time using a pipeline technique.”
#3. CA2427153A1
This patent, filed on October 25, 2001, describes a space-efficient Turbo Decoder primarily designed to reduce the memory footprint of turbo decoding systems, particularly in CDMA transceivers. This invention uses interleaving and deinterleaving techniques alongside memory management improvements for Turbo decoders. Despite its emphasis on optimizing memory, the patent contains certain features that align with US6813742B2, such as iterative processing and the use of functional loops for error correction.
Key Features of this Related Patent:
- Baseband processor for iterative processing of received data – The reference mentions iterative processing of received digital signals, particularly turbo decoding. However, it doesn’t explicitly describe iterative processing across multiple sequences of received baseband digital signals.
- Serially connected soft decision decoders in a circular circuit – The reference describes using two functional loops in the turbo decoder, but it doesn’t explicitly define them as serially connected soft decision decoders in a circular circuit.
- Iterative processing with soft decision feedback – The patent discusses iterative decoding using Log-MAP decoders with interleaving and deinterleaving operations, which implies a form of iterative processing but lacks the explicit connection between decoders’ soft decisions.
- Memory modules coupled to decoders – The reference describes a dual-port extrinsic memory that is coupled to the decoder’s output, aligning with the concept of memory modules being coupled to decoders, but doesn’t apply this universally across all soft decision decoders.
Which Features of US6813742B2 are Disclosed by CA2427153A1?
| Key Feature of US6813742B2 | Disclosure Status |
| A baseband processor iteratively processes multiple sequences of received baseband digital signals | Partially Disclosed |
| A memory module is electrically coupled to an output of each corresponding soft decision decoder | Partially Disclosed |
Key Excerpt from CA2427153A1:
“The present invention relates to a decoder of a turbo code, and more particularly, to a decoder of a turbo code capable of speeding up the decoding time using a pipeline technique.”
#4. US20020056045A1
This patent, filed on October 16, 2001, describes a method for performing turbo decoding in a mobile communication system using two MAP decoders to decode received data iteratively. This patent highlights iterative decoding in mobile environments, which makes it relevant to US6813742B2 due to the similar decoding techniques used in Turbo Codes for improving data reliability in communication systems.
Key Features of this Related Patent:
- Baseband processor for iterative processing of received data – The patent discusses iterative decoding of turbo codes, which involves two MAP decoders processing baseband digital signals iteratively. This directly matches the feature in US6813742B2.
- Serially connected soft decision decoders in a circular circuit – The reference mentions two MAP decoders connected sequentially for iterative decoding but does not explicitly define them as serially connected decoders in a circular circuit.
- Iterative processing with soft decision feedback – Each decoder processes soft decision outputs from the other decoder iteratively, which directly aligns with US6813742B2’s feedback mechanism.
- Memory modules coupled to decoders – This patent describes a memory module storing the outputs of the MAP decoders, which matches the feature of memory coupling seen in US6813742B2.
This is how feature mapping from the tool looks like:
Source: GPS
Which Features of US6813742B2 are Disclosed by US20020056045A1?
| Key Feature of US6813742B2 | Disclosure Status |
| A baseband processor iteratively processes multiple sequences of received baseband digital signals | Fully Disclosed |
| At least two soft decision decoders are connected serially in a circular circuit | Partially Disclosed |
| Each decoder processes soft decisions from the preceding decoder’s output data in an iterative mode | Fully Disclosed |
| A memory module is electrically coupled to an output of each corresponding soft decision decoder | Fully Disclosed |
| The output of the memory module associated with the last soft decision decoder is fed back as input to the first soft decision decoder | Fully Disclosed |
| The output of the memory module associated with the first soft decision decoder is fed as input to the second soft decision decoder | Fully Disclosed |
| The last soft decision decoder receives output from the memory module associated with the preceding soft decision decoder | Partially Disclosed |
Key Excerpt from US20020056045A1:
“The turbo codes are processed for generating bit rows in a block unit… The turbo codes are processed iteratively using two MAP decoders to improve decoding efficiency in mobile communication systems.”
#5. US20020054654A1
This patent, filed on September 4, 2001, describes a lossy compression method in turbo decoders using a sliding window algorithm. The invention aims to reduce computational complexity by storing state metrics (stakes) for future use. This patent is relevant to US6813742B2 due to its focus on iterative decoding and memory management, though it differs in its approach to memory usage and the decoding method.
Key Features of this Related Patent:
- Baseband processor for iterative processing of received data – The patent describes an iterative decoder that processes received signals using a sliding window algorithm, though it does not explicitly state that it processes multiple sequences of received baseband digital signals in the same manner as US6813742B2.
- Serially connected soft decision decoders in a circular circuit – The reference mentions iterative decoding but does not explicitly describe at least two soft decision decoders connected in a circular circuit.
- Iterative processing with soft decision feedback – The reference discusses how state metrics (stakes) are used in subsequent iterations, which indirectly suggests a form of iterative feedback, but it does not explicitly state that each decoder processes soft decisions from the preceding decoder in the same iterative manner as US6813742B2.
- Memory modules coupled to decoders – The patent discusses storing state metrics in memory to reduce computation, which can be seen as memory modules coupled to decoders, but it does not explicitly state this for each decoder.
Which Features of US6813742B2 are Disclosed by US20020054654A1?
| Key Feature of US6813742B2 | Disclosure Status |
| A baseband processor iteratively processes multiple sequences of received baseband digital signals | Partially Disclosed |
| Each decoder processes soft decisions from the preceding decoder’s output data in an iterative mode | Partially Disclosed |
| A memory module is electrically coupled to an output of each corresponding soft decision decoder | Partially Disclosed |
Key Excerpt from US20020054654A1:
“The invention relates to an iterative decoder operative to decode an incoming coded signal with a signal to noise ratio using a sliding window algorithm in which state metrics of a stake are stored for future use as starting points in subsequent iterations.”
Feature Comparison Table
| Key Feature of Claim 1 | CA2273608C | KR100651473B1 | CA2427153A1 | US20020056045A1 | US20020054654A1 |
| A baseband processor iteratively processes multiple sequences of received baseband digital signals | Fully Disclosed | Fully Disclosed | Partially Disclosed | Fully Disclosed | Partially Disclosed |
| At least two soft decision decoders are connected serially in a circular circuit | Partially Disclosed | Fully Disclosed | Partially Disclosed | Partially Disclosed | Not Disclosed |
| Each decoder processes soft decision from the preceding decoder’s output data in an iterative mode | Fully Disclosed | Fully Disclosed | Fully Disclosed | Fully Disclosed | Partially Disclosed |
| A memory module is electrically coupled to an output of each corresponding soft decision decoder | Partially Disclosed | Fully Disclosed | Fully Disclosed | Fully Disclosed | Partially Disclosed |
| The output of the memory module associated with the last soft decision decoder is fed back as input to the first soft decision decoder | Partially Disclosed | Fully Disclosed | Not Disclosed | Fully Disclosed | Not Disclosed |
| The output of the memory module associated with the first soft decision decoder is fed as input to the second soft decision decoder | Not Disclosed | Fully Disclosed | Fully Disclosed | Fully Disclosed | Not Disclosed |
| The last soft decision decoder receives output from the memory module associated with the preceding soft decision decoder | Not Disclosed | Fully Disclosed | Fully Disclosed | Partially Disclosed | Not Disclosed |
How to Find Related Patents Using Global Patent Search
Finding related patents is a critical step in assessing the strength of a patent claim and identifying potential challenges. The Global Patent Search (GPS) tool simplifies this process by providing access to a wide range of patent data and feature mapping. Here’s how GPS can help you identify related patents to US6813742B2 and similar patents in ongoing litigation:
Search by patent number or description – Quickly retrieve patents related to US6813742B2 using its patent number or specific keywords tied to the technology.
Source: GPS
Leverage feature mapping – GPS provides a feature mapping tool that allows you to compare key features of US6813742B2 against existing patents. T
Review matching results – Once you have your search results, you can review the matching patents identified by GPS.
Analyze detailed reports – For each related patent, GPS provides a detailed report that shows how each feature in the patent maps to the claims in US6813742B2, making it easier to identify potential weaknesses or overlaps in the claims.
Make confident decisions – With access to verified data and feature comparison reports, legal teams can make informed decisions about which patents may challenge the validity of US6813742B2 in ongoing litigation or patent portfolio analysis.
In patent litigation, having access to the right related patents is crucial to building a solid case. Using GPS to analyze US6813742B2 and similar patents, legal teams can refine their strategies, anticipate challenges, and ensure a stronger defense or claim.
Take the Guesswork Out of Related Patent Research
Patent disputes can be complex, but finding related patents doesn’t have to be. The Global Patent Search (GPS) tool provides:
- Instant results – No more searching through endless patent databases manually. Get immediate access to related patents and identify potential challenges with ease.
- Accurate feature mapping – GPS helps you compare key features of US6813742B2 against existing patents to see if similar claims have already been disclosed.
- Data-driven insights – Strengthen your case with verified results that show exactly how existing patents overlap with or challenge your claims.
Whether you’re a patent attorney, investigator, or researcher, having the right related patents at your fingertips is essential. With GPS, you can take the guesswork out of patent research and focus on building a solid legal strategy.
Start your search today with Global Patent Search and uncover the related patents that matter most to your case.
Disclaimer: The information provided in this article is for informational purposes only and should not be considered legal advice. The related patent references mentioned are preliminary results from the Global Patent Search (GPS) tool and do not guarantee legal significance. For a comprehensive related patent analysis, we recommend conducting a detailed search using GPS or consulting a patent attorney.
